Optimization and Implementation of Programmable Demodulator for M-PSK/16QAM Signals

In this paper, an optimized programmable demodulation scheme suitable for M-PSK/16QAM signals is proposed. The scheme adopts the conception of component reuse by exploring the demodulation structures of M-PSK and 16QAM respectively. The carrier phase recovery circuit uses the reduced complexity Costas loop. The symbol timing synchronization circuit adopts Gardner loop with offset cancellation. The optimized scheme is implemented in Field Programmable Gate Array (FPGA). The result of the experiment shows that this scheme can realize demodulation for M-PSK and 16QAM signals in real-time with less computation and FPGA resources. And this scheme has good flexibility and adaptability.